Senior Logic Design Engineer, IBM Corporation, Poughkeepsie, NY: Create hardware design description and code complex functions in VHDL (such as PCIe and PBU) for zSeries and L3 Cache. Create hardware documentation specification using various office SW products. Work with designer SIM to pre-validate the design prior to hand of off to the verification team for complete validation of the design. Coordinate work items and delivery schedules between logic and verification. Create architectural and micro-architectural definitions for cache, I/O, and accelerator hardware using various office SW products. Debug hardware design issues and design-phase fails. Analyze system level design aspects using industry standard network analyzer tools (Ethernet sniffers and PCIe analyzer). Lead and coordinate implementation plan for mainframe processor cache using web-based management tools. Represent design stakeholder in EDA front end development efforts, driving requirements and user feedback. Utilize: VHDL; Mantis AET (All Events Trace) Viewer; Wireshark Ethernet analyzer; Agilent PCI-E analyzer; Bughouse Ring Analyzer; Rational Clearquest for issues workflow tracking; C++ and Java; Deflate compression standard; and I/O and system structure. Required: Bachelor's degree or equivalent in Information Technology or related (employer will accept three (3) years of post-secondary study plus one (1) year of IT experience in lieu of a Bachelor's degree) and two (2) years of experience as a Hardware Engineer or related. Two (2) years of experience must include utilizing VHDL; Mantis AET (All Events Trace) Viewer; Wireshark Ethernet analyzer; Agilent PCI-E analyzer; Bughouse Ring Analyzer; Rational Clearquest for issues workflow tracking; C++ and Java; Deflate compression standard; and I/O and system structure. Full time. V396.
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Required Technical and Professional Expertise
Preferred Tech and Prof Experience
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