IBM Thesis: Operating System Facilities for FPGA Accelerator Design in BOEBLINGEN, Germany

Job Description

Background

In the field of FPGA accelerator designs we observed that much of the commonly used functionality amounts to resource and interface abstractions. Traditionally this functionality is provided by operating systems.

With CAPI SNAP, IBM offers accelerator designers building blocks that provide such resource abstractions. Noticing the conceptual similarities of this approach to library operating systems, we are interested in exploring how and to what extent traditional operating system facilities are useful for FPGA accelerator design.

This encompasses evaluating the roles and uses of individual facilities such as virtual memory, scheduling resource protection and even resource abstractions such as file systems.

We consider this line of research relevant because it might reduce the development efforts for accelerator designs by providing predefined implementations of commonly used functionality. Also the aforementioned facilities provide abstractions of the FPGA platform that enable accelerator designs to be specified on a higher and for software developers perhaps more intuitive level. Finally a stable ecosystem of building blocks encourages interoperability between different designs.

Scope of the Master Thesis

  • Investigate the need for, as well as usage and benefit of library functions in FPGA accelerators.

  • Determine the requirements for library functions, such as filesystem or local memory protection, considering the special needs and functions of coherently attached accelerators (IBM CAPI, OpenCAPI 3.0/4.0, CCIX, ...).

  • Implement one or several FPGA library function, such as a filesystem or memory protection unit.

  • Show the applicability and significant advantages using a real-world demo application, for example image or video format conversion

  • Benchmark throughput and latency of the FPGA accelerated solution. Compare it with a pure software implementation, or an implementation without FPGA library functions.

  • Recommend useful library functions with example accelerators.

  • Review the impact on the ease of design, security, and the development and build process when using FPGA library functions.

Prerequisites

To successfully master this thesis, you should have several of the following skills and experiences:

  • Knowledge of a hardware description language such as Verilog and/or VHDL

  • Hands-on FPGA development experience

  • Solid C programming skills

  • Proficiency using Linux

  • Self-motivated and structured work style

When applying for this position, please submit the following (preferably in one single pdf file):

1) Motivation letter

2) CV

3) university enrollment document to prove that you are still studying

4) current transcript of records and other relevant certificates / references

5) Non-EU citizen: copy of passport, residence and work permit

Thank you !

Required Technical and Professional Expertise

see above

Preferred Tech and Prof Experience

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EO Statement

IBM is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.